Study of a Paradigm Called Error-Tolerance
نویسنده
چکیده
This paper is an analytical literature review on the dilemma of error-tolerance (ET) in IC manufacturing industry. The ET has a vast definition in research but, we mainly fuscous on the result acceptability of the the chips that generate erroneous outputs to increase the yield. The source of these errors is fabrication process (process variation or defects). The idea lies behind this question, what if a device is occasionally generating erroneous results but the results are in an acceptable range. Although the idea is simple but there are challenges to overcome (what is the acceptable range, how do we measure the range of error, and how to redesign a system to reduce sensitivity to the faults). But, the most challenging concern is to convince the IC designers that not all the output results need to be perfect and addressing the advertising and marketing issues that this new dilemma arises.
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